1. Field of the Invention
The present invention relates to a process for making stacked high voltage rectifiers of relatively large cross-sectional area.
2. Description of the Prior Art
A typical stacked high voltage rectifier consists of a small plurality of flat semiconductor diodes each having a single p-n junction extending the entire cross-sectional area of the semiconductor. These diodes are stacked and metallurgically bonded together with the p.sup.+ region of one diode facing the n.sup.+ region of the adjacent diode. Electrical leads are connected to the top and bottom of the stack and the entire device is encapsulated.
Such stacked rectifiers have certain benefits. For example, by using plural series connected diodes, high peak inverse voltage ratings are achieved. However, the current rating of such a stacked rectifier is limited by the cross-sectional area of the stacked diodes. In the past, it has generally not been possible on a production basis to manufacture stacked rectifiers having a cross-sectional area of more than about one sixteenth of an inch. The current handled by a stacked rectifier of this one sixteenth inch area is limited to about 250 milliamps as a maximum.
An objective of the present invention is to provide a process for manufacturing stacked high voltage rectifiers having cross-sectional areas substantially greater than one sixteenth of an inch. Since the current rating of such a stacked rectifier increases by the square of the area, average rectified current values substantially greater than those obtainable in the past can be achieved under production conditions using the inventive process. For example, stacked rectifiers having a cross-sectional area of one-eighth inch, with an average rectified current of up to one ampere, readily may be manufactured using the process disclosed herein.
In the past, a number of problems have limited the effective area of stacked diodes. One such problem involves the formation of the p-n junction in each wafer. Advantageously, the junction itself should extend uniformly over the entire area of each diode element in the stack. Typically, these constituent diode elements comprise dice cut from a silicon wafer in which a single p-n diffused junction has been formed across the entire wafer.
Uniformity of the junction across the entire wafer is imperative to ensure that each die cut from the wafer will itself have a junction that is uniform over the entire die. However, prior art doping technique often resulted in nonuniformity, particularly near the outer periphery of the wafers. If a stacked rectifier included even a single diode whose characteristics differed significantly from the others in the stack, the overall peak inverse voltage or average rectified current ratings would be substantially degraded, and the entire rectifier might have to be discarded. Thus, uniformity of the individual p-n junctions in all of the wafers from which the stacked rectifiers are formed is of considerable importance.
Another objective of the present invention is to provide a technique and apparatus for doping the wafers and forming the p-n junctions in such wafers so as to achieve high uniformity.
Another significant problem in the past involves the metallurgical bonding or interconnection of the stacked diodes. Typically this was done by forming a stack of uncoated diode wafers alternating with flat circular metal (typically silver) interlayers, or by forming a stack a diode wafers each coated with metal. The stack was heated to above the semiconductor (typically silicon)-metal eutectic temperature. Advantageously, this formed a bond between the silicon of one wafer, the metal interlayer and the silicon of the adjacent wafer. The stacked wafers then were diced to form the individual rectifiers.
In this metallurgical bonding step, voids often occurred where an effective bond was not achieved uniformly over the entire surface of the adjacent wafers. Current flow is substantially reduced across the area of such a void.
When the wafer stack is cut into dice, such a void may extend over a substantial portion of one or more of the resultant individual rectifiers. In a rectifier having such a void, the current rating may be very substantially reduced. This is true even though the void occurs in only a single one of the plural metallurgical bonds between the many diode elements of the stack. Of course, if voids should occur in the metallurgical bonds between more than one pair of the diodes in a stack, the current rating may be even further reduced.
Thus the occurrence of even small voids in the metallurgical bonds may substantially reduce the yield or number of acceptable stacked rectifiers that are produced from a particular stack of wafers. Another objective of the present invention is to provide a technique for metallurgically bonding a stack of diode wafers in a manner that is substantially free of voids. A further objective is to provide appropriate jig and furnace apparatus for accomplishing such substantially void-free metallurgical bonding of stacked wafers.
Yet another objective is to provide an overall process for making large area stacked high voltage rectifier in which each of the process steps is compatible with all of the others.